1. Field of the Invention
The present invention relates generally to processors, and in particular to capturing and storing processor trace data.
2. Description of the Related Art
Methods and mechanisms have been developed to accumulate debugging information for processors within a system on chip (SoC). Typically, the processors execute programs that interact with other devices within a SoC. A program may comprise one or more instruction sequences, which can include branches within the sequences, branches to other sequences, etc. Each instruction may be identified by an address, or PC, which locates the instruction in memory (indirectly, when address translation is enabled).
During development of the SoC and programs to execute on the SoC, various debugging aids can be useful. For example, the stream of PCs executed by the processor may be useful to determine the program flow. Both functional problem diagnoses (traditional debugging) and performance problem diagnoses (e.g., determining why performance is lower than expected) can benefit from having access to the stream of PCs executed by the processor. The stream of PCs may also be referred to as trace data or PC trace data. Oftentimes, the trace data may be stored temporarily in a small buffer before being written to memory.
As the complexity of the processors and the SoC including the processors increases (superscalar design, multiple cores per chip, etc.), the number of PCs per clock cycle increases. As a result, the amount of trace data captured in real time expands dramatically, and the trace buffer may fill up rapidly and need to be written to memory on a frequent basis. Accordingly, the dumping of the trace buffer to memory may interfere with the operation of the processors, which may change the way the processors behave when tracing is enabled versus when tracing is not enabled.